TSEK06
VLSI Chip Design Project

Directions for setting up your project working directory are available here.

A comprehensive introduction to design and fabrication of Very Large Scale Integrated (VLSI) circuits in CMOS technology. The course gives an excellent insight into VLSI chip design and high-performance, low-power circuit techniques. The course supports the CDIO project flow and the LIPS project model to promote teamwork and communication skills required by industry to run large and complex design projects.

• 8 lectures support the design projects including project descriptions, project planning, and VLSI circuits and chip design techniques in sub-micron CMOS.
• 6 X 4 hours labs (a mini-project) introduce the full design flow and CAD tools to be used in the actual projects.
• Chip design project (the main part of the course): 5 students/team design a complete and ready-for-fabrication VLSI chip in a 0.35 µm CMOS process. Each team has the opportunity to select one of many pre-defined design projects on digital, mixed-signal, and/or RF circuits. Past project examples include: processor- and ALU-blocks, digital camera sensors, memories, high-speed I/0, advanced timing circuits, ADCs, DACs, filters, radio transceiver blocks, etc.
• At the end of the course, the designed circuits will be sent for fabrication to an Austrian CMOS process foundry. The manufactured chips will be available for measurement in a follow-up course, TSEK11 Evaluation of an Integrated Circuit.

• There are six 4-hour lab occasions where you will go through the complete CAD workflow, from high-level modeling to layout and parasitic extraction, and finally the the assembly of a ready-to-fabricate chip.
• The labs are solved in groups of 2-3 students. There are multiple rooms booked so that all students will be fit into each session. There is no prior registration for any occasion, just show up on time and start working.
• The labs are fully described in the laboratory manual that is available for purchase at Bokakademin (the bookshop in Kårallen, see Literature below).
• To make it easier for yourselves, come well-prepared to each lab, i.e: solve the preparatory excercises and make sure you have read through the lab thoroughly. Also, try to finish the labs as soon as possible as this will help you with your projects. If you find that you are having trouble finishing the labs during the scheduled time, then you may need to work on your own time as well.

• Jan M. Rabaey, Digital Integrated Circuits,
  Prentice-Hall International Edition, ISBN 0-13-394271-6, 1996
• Laboratory Manual - TSEK06 VLSI Chip Design Project
  Available at Bokademin (the bookshop in Kårallen)
• Project Guide - TSEK06 VLSI Chip Design Project and TSEK11 Evaluation of an IC
  Also available at Bokademin (the bookshop in Kårallen)

• Completed labs
• Completed chip design and final project report before the project deadline

Pass or Fail.

Fundamentals of electronics, switching theory, MOS transistors and CMOS technology, radio electronics, digital and analog integrated circuits.

• Instructor
  Atila Alvandpour, Professor
  Electronic Devices, Department of Electrical Engineering (ISY)
  Office 229:206, B-huset
  Tel: 013-285818
  E-mail: atila@isy.liu.se
• Head Teaching Assistant
  Daniel Svärd, Ph.D. Student
  Electronic Devices, Department of Electrical Engineering (ISY)
  Office 229:218, B-huset
  Tel: 013-288946
  E-mail: svard@isy.liu.se

Links to the specifications for all of the projects that are available for this year are given below:

• Project 1: 1st Order Sigma-Delta Modulator with 3-bit Quantizer
• Project 2: 2nd Order Band-Pass Sigma-Delta Modulator with 1-bit Quantizer
• Project 3: High Speed 6-bit DAC
• Project 4: 16-bit Kogge-Stone Adder
• Project 5: DLL Based Frequency Multiplier
• Project 6: 8-bit Successive Approximation ADC
• Project 7: 100 MHz, 10 dBm Direct VCO Modulating FM Transmitter
• Project 8: PLL Based Binary Frequency Shift Keying Modulator

A repository of project specifications for earlier years of this course is available here.

• 2004 Chip Photos
• 2005 Chip Photos
• 2006 Chip Photos
• 2007 Chip Photos
• 2008 Chip Photos
• 2009 Chip Photos
• 2010 Chip Photos
• 2011 Chip Photos

Here are links to some information and documents that you may find useful when doing your project:

• Word template for Reports
• Excel sheet for time plan and time report
• Hints for project participants
• Information about project workspaces
• Common layout mistakes