Responsible for this page: Daniel Svärd , svard@isy.liu.se
Page last update: 2012-01-12
Responsible for this page: Daniel Svärd , svard@isy.liu.se
Page last update: 2012-01-12
| 12 Jan. 2012 | Final presentations will be held Monday January 16 at 17.15 in C2. |
This course is a follow-up to TSEK06 VLSI Design Project and gives the students a possibility to test and evaluate their chip designs.
The student must have attended TSEK06 VLSI Design Project and sent a chip for fabrication.
The only grades given are fail and pass. These will be based on both the evaluation effort and a written report that describes the evaluation and the outcome of it. Also a short presentation of the measurment is required.
The report should be handed in to the supervisors by the end of the course. The exact date will be posted on this page later.
